Ultra fast switching speed of superconducting digital circuits enable realization of Digital Signal Processors with performance unattainable by any other technology. Based on rapid-single-flux technology (RSFQ) logic, these integrated circuits are capable of delivering high computation capacity up to 30 GOPS on a single processor and very short latency of 0.1 ns. There are two main applications of such hardware for practical telecommunication systems: filters for superconducting ADCs operating with digital RF data and recursive filters at baseband. The later of these allows functions such as multiuser detection for 3G WCDMA, equalization and channel precoding for 4G OFDM MIMO, and general blind detection. The performance gain is an increase in the cell capacity, quality of service, and transmitted data rate. The current status of the development of the RSFQ baseband DSP is discussed. Major components with operating speed of 30 GHz have been developed. Designs, test results, and future development of the complete systems including cryopackaging and CMOS interface are reviewed.

To precisely model the time dependency of features is one of the important issues for speech recognition. Segmental unit input HMM with a dimensionality reduction method has been widely used to address this issue. Linear discriminant analysis (LDA) and heteroscedastic extensions, e.g., heteroscedastic linear discriminant analysis (HLDA) or heteroscedastic discriminant analysis (HDA), are popular approaches to reduce dimensionality. However, it is difficult to find one particular criterion suitable for any kind of data set in carrying out dimensionality reduction while preserving discriminative information. In this paper, we propose a new framework which we call power linear discriminant analysis (PLDA). PLDA can be used to describe various criteria including LDA, HLDA, and HDA with one control parameter. In addition, we provide an efficient selection method using a control parameter without training HMMs nor testing recognition performance on a development data set. Experimental results show that the PLDA is more effective than conventional methods for various data sets.

CORDIC (COordinate Rotation DIgital Computer) is a well known algorithm using simple adders and shifters to evaluate various elementary functions. Thus, CORDIC is suitable for the design of high performance chips using VLSI technology. In this paper, a complete analysis of the computation error of both the (conventional) CORDIC algorithm and the CORDIC algorithm with expanded convergence range is derived to facilitate the design task. The resulting formulas regarding the relative and absolute approximation errors and the truncation error are summarized in the tabular form. As the numerical accuracy of CORDIC processors is determined by the word length of operands and the number of iterations, three reference tables are constructed for the optimal choice of these numbers. These tables can be used to facilitate the design of cost-effective CORDIC processors in terms of areas and performances. In addition, two design examples: singular value decomposition (SVD) and lattice filter for digital signal processing systems are given to demonstrate the goal and benefit of the derived numerical analysis of CORDIC.

In the main part of this paper, we present a systematic discussion for the optimum interpolation approximation in a shift-invariant wavelet and/or scaling subspace. In this paper, we suppose that signals are expressed as linear combinations of a large number of base functions having unknown coefficients. Under this assumption, we consider a problem of approximating these linear combinations of higher degree by using a smaller number of sample values. Hence, error of approximation happens in most cases. The presented approximation minimizes various worst-case measures of approximation error at the same time among all the linear and the nonlinear approximations under the same conditions. The presented approximation is quite flexible in choosing the sampling interval. The presented approximation uses a finite number of sample values and satisfies two conditions for the optimum approximation presented in this paper. The optimum approximation presented in this paper uses sample values of signal directly. Hence, the presented result is independent from the so-called initial problem in wavelet theory.

The large PAPR of orthogonal frequency division multiplexing (OFDM) transmission is one of the serious problems for mobile communications that require severe power saving. Iterative clipping and filtering is an effective method for the PAPR reduction of OFDM signals. This paper evaluates PAPR reduction effect with a graded band-limiting filter in the iterative clipping and filtering method. The evaluation result by computer simulation shows that the excellent peak reduction effect can be obtained in the fewer iteration numbers by using a roll-off filter instead of the conventional rectangular filter, and the iteration number with the roll-off filter achieving the same PAPR is fewer by twice. The result confirms that the clipping and filtering method by using a graded band-limiting filter can achieve low peak OFDM transmission with less computational complexity.

In this paper, we propose two 2's-complement fixed-width Booth multipliers that can generate an n-bit product from an n-bit multiplicand and an n-bit multiplier. Compared with previous designs, our multipliers have smaller truncation error, less area, and smaller time delay in the critical paths. A four-step approach is adopted to search for the best error-compensation bias in designing a multiplier suitable for VLSI implementation. Last but not least, we show the superior capability of our designs by inscribing it in a speech signal processor. Simulation results indicate that this novel design surpasses the previous fixed-width Booth multiplier in the precision of the product. An average error reduction of 65-84% compared with a direct-truncation fixed-width multiplier is achieved by adding only a few logic gates.

This paper proposes a novel signal estimation method that uses a tensor product expansion. When a bivariable function, which is expressed by two-dimensional matrix, is subjected to conventional tensor product expansion, two single variable functions are calculated by minimizing the mean square error between the input vector and its outer product. A tensor product expansion is useful for feature extraction and signal compression, however, it is difficult to separate global noise from other signals. This paper shows that global noise, which is observed in almost all input signals, can be estimated by using a tensor product expansion where absolute error is used as the error function.

The Multiple Access Interference (MAI) and the Multipath Fading (MPF) restrict the performance of Code-Division Multiple-Access (CDMA) systems. The Multiuser Detection (MUD) based on Particle Swarm Optimization algorithm (PSO) with Rake processing is proposed in this paper to overcome these obstacles, followed by full details of how to apply the Binary PSO MUD (BPSO-MUD) on a CDMA system. Simulations show that the BPSO-MUD has significantly better performance than the Conventional Detection (CD).

Performance analysis of ultra-fast all-optical analog-to-digital converter using optical multiple-level thresholding module based on self-frequency shift in fiber is described. In analog-to-digital conversion, the purposes of optical sampling and optical quantization are in the possibility of the speed-up of sampling and quantization processes using various ultra-fast nonlinear phenomena depending on an intensity of a light. The result of analysis indicates that the number of achievable quantized levels of the proposed approach is in the increasing tendency with an increase in the peak power of an input pulse.

The uni-traveling-carrier photodiode (UTC-PD) is an innovative PD that has a unique operation mode in which only electrons act as the active carriers, resulting in ultrafast response and high electrical output power at the same time. This paper describes the features of the UTC-PD and its excellent performance. In addition, UTC-PD-based optoelectronic devices integrated with various elements, such as passive and active devices, are presented. These devices are promising for various applications, such as millimeter- and submillimeter-wave generation up to the terahertz range and ultrafast optical signal processing at data rates of up to 320 Gbit/s.

In real-time multimedia processing systems a very large part of the power consumption is due to the data storage and data transfer. Moreover, the area cost is often largely dominated by the memory modules. In deriving an optimized (for area and/or power) memory architecture, memory size computation is an important step in the exploration of the possible algorithmic specifications of multimedia applications. This paper presents a novel non-scalar approach for computing exactly the memory size in real-time multimedia algorithms. This methodology uses both algebraic techniques specific to the data-flow analysis used in modern compilers and, also, more recent advances in the theory of polyhedra. In contrast with all the previous works which are only estimation methods, this approach performs exact memory computations even for applications significantly large in terms of the code size, number of scalars, and number of array references.

A nonlinear optical fiber loop mirror (NOLM) adapted for all-optical 2R operation at ultrahigh bit-rates was experimentally and theoretically investigated. The proposed NOLM was created by adding inline/external fiber polarizers and also an inline optical phase-bias compensator (OPBC) to a standard NOLM. A theoretical investigation revealed that the operation of the standard NOLM became unstable due to residual polarization crosstalk of the polarization-maintaining optical components making up the NOLM, and that it could be dramatically improved with the inline/external polarizers. The NOLM with the polarizers ensured stable switching operation with high switching-dynamic-range (>30 dB) against the change of the wavelength of the input clock pulses, and the change of the environment temperature. We also experimentally verified that the OPBC played a dramatic role to ensure excellent dynamic switching performance of the NOLM, and to achieve signal-Q-recovery of the regenerated signals. All optical 2R experiments at 40 Gb/s and 160 Gb/s were performed with the modified NOLM. Signal regeneration with improved extinction ratio and signal Q value was successfully demonstrated. Q-recovery to the input of the control pulses degraded with ASE noise accumulation was also successfully achieved.

We previously proposed an architecture for software defined radio called the reconfigurable packet routing-oriented signal processing platform (RPPP). This architecture was suited to wireless signal processing applications, which require radio functions to be selected in real time depending on the transmitted signal. A number of radio standards are used in DSRC systems for vehicle communication and vehicle equipment is required to transmit and receive the radio signals used on each particular occasion. An implementation of RPPP is described in this paper that enables the dynamic handling of two ARIB standards for DSRC. After an explanation of the basic architecture and an analysis of RPPP, the implementation of a reconfigurable DSRC transceiver for ASK and π/4 shift-QPSK is described. The implementation is then discussed, evaluated in terms of the number of logic units needed. We concluded that our platform is 27.6% more efficient in utilizing logic than that achieved with fixed design.

For super-parallel video processing, we proposed a power- and area-efficient SRAM core architecture with a segmentation-free access, which means accessibility to arbitrary consecutive pixels, and horizontal/vertical access. To achieve these flexible accesses, a spirally-connected local-wordline select signal and multi-selection scheme in wordlines are proposed, so that extra X-decoders in the conventional multi-division SRAM can be eliminated. Consequently, the proposed SRAM reduces a power and area by 57-60% and 60%, respectively, when it is applied to a 128 parallel architecture. The proposed 160-kbit SRAM with 16-read ports (2-read port SRAM with eight-parallel architecture) is implemented to a search window buffer for an H.264 motion estimation processor core which dissipates 800 µW for QCIF 15-fps in a 130-nm technology.

In this paper, a novel cost effective interconnection network for two-way pipelined SIMD-based reconfigurable computing processor is proposed. Our reconfigurable computing engine is composed of the SIMD-based function units, flexible interconnection networks, and two-bank on-chip memories. In order to connect the function units, the reconfigurable network is proposed to connect all neighbors of each function unit. The proposed interconnection network is a kind of full and bidirectional connection with the data duplication to perform the data-parallelism applications efficiently. Moreover, it is a multistage network to accomplish the high flexibility and low hardware cost.

The recognition vector of the decision-theoretic approach and that of cumulant-based classification are combined to compose a higher dimension hyperspace to get the benefits of both methods. The method proposed in this paper can cover more kinds of signals including signals with order higher than 4 in the AWGN channel even under low SNR values, i.e. those down to -5 dB. The composed vector is input into an RBF neural network to get more reasonable reference points. Eleven kinds of signals, say 2ASK, 4ASK, 8ASK, 2PSK, 4PSK, 8PSK, 2FSK 4FSK, 8FSK, 16QAM and 64QAM, are involved in the discussion.

One of the key technologies to realize future broadband mobile communications is orthogonal frequency division multiplexing (OFDM) transmission. However, the peak-to-average power ratio (PAPR) in OFDM transmission is so much larger than that in single carrier transmission that its adoption in mobile communication systems is uncertain. This paper evaluates the transmission performance possible with iterative peak reduction to design more efficient OFDM transmitters. The PAPR reduction effect and bit error rate (BER) performance are clarified by computer simulations. We calculate the set PAPR value that achieves a target PAPR in the iterative peak reduction method. The required Eb/N0 performance is evaluated under the calculated PAPR condition. The results are effective in designing the back-off value of a transmission power amplifier given fixed transmission quality and computational complexity.

In this paper, Morse code is selected as a communication adaptive device for persons whose hand coordination and dexterity are impaired by such ailments as amyotrophic lateral sclerosis, multiple sclerosis, muscular dystrophy, and other severe handicaps. Morse code is composed of a series of dots, dashes, and space intervals, and each element is transmitted by sending a signal for a defined length of time. A suitable adaptive automatic recognition method is needed for persons with disabilities due to their difficulty in maintaining a stable typing rate. To overcome this problem, the proposed method combines the support vector machines method with a variable degree variable step size LMS algorithm. The method is divided into five stages: tone recognition, space recognition, training process, adaptive processing, and character recognition. Statistical analyses demonstrated that the proposed method elicited a better recognition rate in comparison to alternative methods from the literature.

Employing noise masking threshold (NMT) to adapt a speech enhancement system has become popular due to the advantage of rendering the residual noise to perceptually white. Most methods employ the NMT to empirically adjust the parameters of a speech enhancement system according to the various properties of noise. In this article, without any predefined empirical factor, an explicit-form gain factor for a frequency bin is derived by perceptually constraining the residual noise below the NMT in spectral domain. This perceptual constraint preserves the spectrum of noisy speech when the level of residual noise is less than the NMT. If the level of residual noise exceeds the NMT, then the spectrum of noisy speech is suppressed to reduce the corrupting noise. Experimental results show that the proposed approach can efficiently remove the added noise in cases of various noise corruptions, and almost free from musical residual noise.

In this paper, we propose a driver identification method that is based on the driving behavior signals that are observed while the driver is following another vehicle. Driving behavior signals, such as the use of the accelerator pedal, brake pedal, vehicle velocity, and distance from the vehicle in front, were measured using a driving simulator. We compared the identification rate obtained using different identification models. As a result, we found the Gaussian Mixture Model to be superior to the Helly model and the optimal velocity model. Also, the driver's operation signals were found to be better than road environment signals and car behavior signals for the Gaussian Mixture Model. The identification rate for thirty driver using actual vehicle driving in a city area was 73%.